This Application Note explores the implications associated with performing Direct Memory Access (DMA) operations on an ARM multi-core system such as the ARM11 MPCore and Cortex-A9 MPCore. The target ...

Many people have heard the term cache coherency without fully understanding the considerations in the context of system-on-chip (SoC) devices, especially those using a network-on-chip (NoC). To ...

Data movement, congestion, and energy efficiency are key determiners of whether compute is usable. Different processors bring various coherency challenges. For example, a cache-coherent NoC for CPUs ...

I was just chatting with my chum Andy Nightingale, who is VP of Product Management and Marketing at Arteris IP. What’s with the “IP” portion of the Arteris moniker? Well, in the context of ...